Channel coupling for an AC-3 encoder

ABSTRACT

Channel coupling for an AC-3 encoder, using mixed precision computations and 16-bit coupling coefficient calculations for channels with 32-bit frequency coefficients.

TECHNICAL FIELD

This invention is applicable in the field of an AC-3 Encoder and inparticular to channel coupling on a 16-bit fixed point DSP.

BACKGROUND OF THE INVENTION

Recent years have witnessed an unprecedented increase in the use ofpsycho-acoustic models for the design of audio coders. This has led tohigh compression ratios while keeping audible degradation in thecompressed signal to a minimum. Description of one such method, which isthe centre of current discussion, can be found in the ATSC Standard,“Digital Audio Compression (AC-3) Standard”, Document A/52, 20 Dec.,1995.

In the AC-3 encoder the input time domain signal is sectioned intoframes, each frame comprising of six audio blocks. Since AC-3 is atransform coder, the time domain signal in each block is converted tothe frequency domain using a bank of filters. The frequency domaincoefficients, thus generated, are next converted to fixed pointrepresentation. In fixed point syntax, each coefficient is representedas a mantissa and an exponent. The bulk of the compressed bitstreamtransmitted to the decoder comprises these exponents and mantissas.

Each mantissa must be truncated to a fixed or variable number of decimalplaces. The number of bits to be used for coding each mantissa is to beobtained from a bit allocation algorithm which may be based on themasking property of the human auditory system. Lower number of bitsresult in higher compression ratio because less space is required totransmit the coefficients. However, this may cause high quantizationerror leading to audible distortion. A good distribution of availablebits to each mantissa forms the core of the advanced audio coders.

Further compression can be successfully obtained in AC-3 by use of atechnique called coupling. Coupling takes advantage of the way the humanear determines directionality for very high frequency signals, in orderto allow a reduction in the amount of data necessary to code audiosignals. At high audio frequency (approximately above 2 KHz.), the humanear is physically unable to detect individual cycles of an audiowaveform, and instead responds to the envelope of the waveform.Consequently, the coder combines the high frequency coefficients of theindividual channels to form a common coupling channel. The originalchannels combined to form the said coupling channel are referred to ascoupled channels.

The translation of the AC-3 Encoder Standard on to the firmware of aDSP-Core involves several phases. Firstly, the essential compressionalgorithm blocks for the AC-3 Encoder have to be designed. Afterindividual blocks are completed, they are integrated into an encodingsystem which receives a PCM (pulse code modulated) stream, processes thesignal applying signal processing techniques such as transientdetection, frequency transformation, psychoacoustic analysis (coupling &bit-allocation), and produces a compressed stream in the format of theAC-3 Standard.

The coded stream should be capable of being decompressed by any standardAC-3 Decoder and the PCM stream generated thereby should be comparablein audio quality to the original music stream. If the original streamand the decompressed stream are indistinguishable in audible quality (atreasonable level of compression) the development moves to the thirdphase. If the quality is not transparent (indistinguishable), furtheralgorithm development and improvements continue.

In the third phase the algorithms are implemented using the word-lengthspecifications of the target DSP-Core. Most commercial DSP-Cores allowonly fixed point arithmetic (since floating point engine is costly interms of area). Consequently the algorithm is translated to a fixedpoint solution. The word-length used is usually dictated by the ALU(arithmetic-logic unit) capabilities and bus-width of the target core.For example AC-3 Encoder on Motorala's 56000 would use 24-bit precisionsince it is a 24-bit Core. Similarly, for implementation on Zoran'sZR38000 which has 20-bit data path, 20-bit precision would be used [4].

If, for example, 20-bit precision is discovered to provide unacceptablelevel of sound quality, the provision to use double precision alwaysexist. In this case each piece of data is stored and processed as twosegments, lower and upper words, each of 20-bit length. The accuracy ofimplementation is doubled but so is the computational complexity—doubleprecision multiplication could require 6 or more cycles while singleprecision multiplication and addition (MAC) requires only a singlecycle).

Twenty four bit AC-3 Encoders are known to provide sufficient quality.However 16-bit single precision AC-3 Encoder quality is viewed asterribly poor. Consequently few or no attempts (at least not published)to use 16-bit Core for AC-3 Encoder has been made to date.

Coupling is one of the most difficult and tricky algorithm to implementon a fixed-point processor and it becomes even more so when attempted ona 16-bit processor. It can be quite computationally demanding and if notimplemented intelligently can lower the accuracy of the representedsignal, thereby effecting final quality of the reproduced (decoded)signal.

Single precision 16-bit implementation of AC-3 Encoder is generallyconsidered unacceptable in quality and such a product would be at adistinct disadvantage in the consumer market. Double precisionimplementation is too computationally costly. It has been estimated thatsuch an implementation would require over 120 MIPS (million instructionper second). This exceeds what most commercial DSPs can provide(moreover, extra MIPS are always needed for system software andvalue-added features). One of the most difficult section of AC-3 for a16-bit processor is the Coupling. So the question is: is it possible toimplement high quality AC-3 Encoder Coupling on a 16-bit DSP withreasonable computational requirement ?

SUMMARY OF THE INVENTION

The invention seeks to use single precision implementation, inparticular 16-bit reduced bit computation calculating couplingcoefficients of double precision (32-bit) frequency coefficients,thereby rendering the 16-bit AC-3 encoder suitable for commercialpurposes. The invention does, of course, have application to encoderswith larger bit capacity.

In accordance with the invention, there is provided a coupling processfor use in reduced bit processing, including calculating a power valueof a coupled channel by normalising frequency coefficients within achannel band to produce mantissas with respective normalisation valuesrepresented by a prescribed number of reduced bits, calculating a sum ofthe square of the values and post-shifting the resultant sum to obtain apower value.

In another aspect, there is provided a signal processor for a couplingprocess having:

-   -   first and second coupled channel register;    -   a coupling channel means for combining frequency coefficients of        the first and second coupled channel;    -   a coupling coordinate calculation means including:    -   normalisation means for analysing mantissas of the frequency        coefficients in a channel band in each of the channels, the        normalisation means producing first normalisation values for        each respective channel represented by a prescribed number of        reduced bits;    -   calculation means for determining a sum of the square of values        for each channel;    -   shifting means for post-shifting each sum to obtain a power        value for each of the channels;    -   divider means for providing a mantissa quotient by dividing the        post shifted sum of the first and second coupled channels by the        post shifted sum of the coupling channel, reduced to a        prescribed number of reduced bits; and    -   a lookup table for providing square root values of the mantissa        quotients, the square root values representing a mantissa        component of the coupling coordinate of each of the first and        second coupled channels.

Preferably, the frequency coefficients are each 32-bit and are assumedto be stored in two 16-bit registers. For phase and coupling strategycalculations the upper 16-bit of the data is utilized. Once the strategyfor combining the coupled channel to form the coupling channel is known,the combining process uses the full 32-bit data. The computation isreduced while the accuracy is still high. Simple truncation of the upper16-bit of the 32-bit data for the phase and coupling strategycalculation leads to poor result (only 80% of the time the strategymatches with that from the floating point version). If block exponentmethod is used the strategy is 97% of the time exactly same as thefloating point.

Similarly, power values necessary for coupling co-ordinate calculationsare derived from 16-bit coefficients (obtained from normalisationfollowed by truncation of 32-bit coefficients). Square root of the ratioof power values is obtained for the mantissa part by a table look-up Theexponent, derived from shift values used for normalising coupling andcoupled channel coefficients, is converted to an even number and dividedby two. This together with the table look-up for mantissa is equivalentto square root of the actual power ratio in the floating point methodused for calculating coupling-coordinate.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is more fully described, by way of non-limiting exampleonly, with reference to the accompanying drawings, in which:

FIG. 1 is a representation of an AC-3 frame;

FIG. 2 is a schematic representation of an AC-3 encoder;

FIG. 3 illustrates a coupling process;

FIG. 4 is a representation of a mantissa of a frequency component;

FIG. 5 is a schematic representation of a coupling co-ordinatecalculation.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT

The input to the AC-3 audio encoder comprises a stream of digitisedsamples of the time domain audio signal. If the stream is multi-channelthe samples of each channel appear in interleaved format. The output ofthe audio encoder is a sequence of synchronisation frames of the serialcoded audio bit stream. For advanced audio encoders, such as the AC-3,the compression ratio can be over ten.

FIG. 1 shows the general format of an AC-3 frame. A frame consists ofthe following distinct data fields:

-   -   a synchronisation header (sync information, frame size code)    -   the bit-stream information (information pertaining to the whole        frame)    -   the 6 blocks of packed audio data    -   two CRC error checks

The bulk of the frame size is consumed by the 6 blocks of audio data.Each block is a decodable entity, however not all information to decodea particular block is necessarily included in the block. If informationneeded to decode blocks can be shared across blocks, then thatinformation is only transmitted as part of the first block in which itis used, and the decoder reuses the same information to decode laterblocks.

All information which may be conditionally included in a block is alwaysincluded in the first block. Thus, a frame is made to be an independententity: there is no inter-frame data sharing. This facilitates splicingof encoded data at the frame level, and rapid recovery from transmissionerror. Since not all necessary information is included in each block,the individual blocks in a frame may vary in size, with the constraintthat the sum of all blocks must fit the frame size.

A. System OverView

Like the AC-2 single channel coding technology from which it derives,AC-3 is fundamentally an adaptive transform-based coder using afrequency-linear, critically sampled filterbank based on the PrincenBradley Time Domain Aliasing Cancellation (TDAC) J. P. Princen and A. B.Bradley, “Analysis/Synthesis Filter Bank Design Based on Time DomainAliasing Cancellation”, IEEE Trans. Acoust., Speech, Signal Processing,vol. ASSP-34, no. 5, pp. 1153–1161, October 1986.

A.1 Major Processing Blocks

The major processing blocks of the AC-3 encoder are shown in FIG. 2. Abrief description is provided below, with special emphasis on issueswhich are relevant to the subject of this patent.

A. 1.1 Input Format

AC-3 is a block structured coder 10, so one or more blocks of timedomain signal, typically 512 samples per block and channel, arecollected in an input buffer before proceeding with additionalprocessing.

A. 1.2 Transient Detection

Block of signal for each channel is next analysed with a high passfilter 11 to detect presence of transients 12. This information is usedto adjust the block size of the TDAC (time domain aliasing cancellation)filter bank 13, restricting quantization noise associated with thetransient within a small temporal region about the transient. Inpresence of transient the bit ‘blksw’ for the channel in the encoded bitstream in the particular audio block is set.

A.1.3 TDAC Filter

Each channel's time domain input signal is individually windowed andfiltered with a TDAC-based analysis filter bank to generate frequencydomain coefficients. If the blksw bit is set, meaning that a transientwas detected for the block, then two short transforms of length 256 eachare taken, which increases the temporal resolution of the signal. If notset, a single long transform of length 512 is taken, thereby providing ahigh spectral resolution.

The number of bits to be used for coding each coefficient needs to beobtained next. Lower number of bits result in higher compression ratiobecause less space is required to transmit the coefficients. However,this may cause high quantization error leading to audible distortion. Agood distribution of available bits to each coefficient forms the coreof the advanced audio coders.

A.1.4 Coupling

Further compression can be achieved in AC-3 by use of a technique knownas coupling. Coupling can occur at block 14 takes advantage of the waythe human ear determines directionality for very high frequency signals.At high audio frequency (approx. above 4 KHz.), the ear is physicallyunable to detect individual cycles of an audio waveform and insteadresponds to the envelope of the waveform. Consequently, the encodercombines the high frequency coefficients of the individual channels toform a common coupling channel. The original channels combined to formthe coupling channel are called the coupled channel.

The most basic encoder can form the coupling channel by simply takingthe average of all the individual channel coefficients. A moresophisticated encoder could alter the signs of the individual channelsbefore adding them into the sum to avoid phase cancellation.

The generated coupling channel is next sectioned into a number of bands.For each such band and each coupling channel a coupling co-ordinate istransmitted to the decoder. To obtain the high frequency coefficients inany band, for a particular coupled channel, from the coupling channel,the decoder multiplies the coupling channel coefficients in thatfrequency band by the coupling co-ordinate of that channel for thatparticular frequency band. For a dual channel encoder a phase correctioninformation is also sent for each frequency band of the couplingchannel.

A. 1.5 Rematrixing

An additional process, rematrixing which occurs at 15, is invoked in thespecial case that the encoder is processing two channels only. The sumand difference of the two signals from each channel are calculated on aband by band basis, and if, in a given band, the level disparity betweenthe derived (matrixed) signal pair is greater than the correspondinglevel of the original signal, the matrix pair is chosen instead. Morebits are provided in the bit stream to indicate this condition, inresponse to which the decoder performs a complementary unmatrixingoperation to restore the original signals. The rematrix bits are omittedif the coded channels are more than two.

The benefit of this technique is that it avoids directional unmasking ifthe decoded signals are subsequently processed by a matrix surroundprocessor, such as Dolby Prologic decoder.

A.1.6 Conversion to Floating Point

The transformed values, which may have undergone rematrix and couplingprocess, are converted to a specific floating point representation,resulting in separate arrays of binary exponents and mantissas. Thisfloating point arrangement is maintained through out the remainder ofthe coding process, until just prior to the decoder's inverse transform,and provides 144 dB dynamic range, as well as allows AC-3 to beimplemented on either fixed or floating point hardware.

Coded audio information consists essentially of separate representationof the exponent and mantissas arrays. The remaining coding processfocuses individually on reducing the exponent and mantissa data rate.

The exponents are extracted at 16 and coded at 17 using one of theexponent coding strategies derived at 18. Each mantissa is truncated toa fixed number of binary places. The number of bits to be used forcoding each

bit allocation algorithm which is based on the masking property of thehuman auditory system.

A. 1.7 Exponent Coding Strategy

Exponent values in AC-3 are allowed to range from 0 to −24. The exponentacts as a scale factor for each mantissa. Exponents for coefficientswhich have more than 24 leading zeros are fixed at −24 and thecorresponding mantissas are allowed to have leading zeros.

AC-3 bit stream contains exponents for independent, coupled and thecoupling channels. Exponent information may be shared across blockswithin a frame, so blocks 1 through 5 may reuse exponents from previousblocks.

AC-3 exponent transmission employs differential coding technique, inwhich the exponents for a channel are differentially coded acrossfrequency. The first exponent is always sent as an absolute value. Thevalue indicates the number of leading zeros of the first transformcoefficient. Successive exponents are sent as differential values whichmust be added to the prior exponent value to form the next actualexponent value.

The differential encoded exponents are next combined into groups. Thegrouping is done by one of the three methods: D15, D25 and D45. Thesetogether with ‘reuse’ are referred to as exponent strategies. The numberof exponents in each group depends only on the exponent strategy. In theD15 mode, each group is formed from three exponents. In D45 fourexponents are represented by one differential value. Next, threeconsecutive such representative differential values are grouped togetherto form one group. Each group always comprises of 7 bits. In case thestrategy is ‘reuse’ for a channel in a block, then no exponents are sentfor that channel and the decoder reuses the exponents last sent for thischannel.

Choice of the suitable strategy for exponent coding forms a crucialaspect of AC-3. D15 provides the highest accuracy but is low incompression. On the other hand transmitting only one exponent set for achannel in the frame (in the first audio block of the frame) andattempting to ‘reuse’ the same exponents for the next five audio block,can lead to high exponent compression but also sometimes very audibledistortion.

A.1.8 Bit Allocation for Mantissas

The bit allocation algorithm analyses the spectral envelope of the audiosignal being coded, with respect to masking effects, to determine thenumber of bits to assign to each transform coefficient mantissa. In theencoder, the bit allocation is recommended to be performed globally onthe ensemble of channels as an entity, from a common bit pool.

The bit allocation routine contains a psycho-analysis 19 such as aparametric model of the human hearing for estimating a noise levelthreshold, expressed as a function of frequency, which separates audiblefrom inaudible spectral components. Various parameters of the hearingmodel can be adjusted by the encoder depending upon the signalcharacteristic. For example, a prototype masking curve is defined interms of two piece wise continuous line segment, each with its own slopeand y-intercept.

B. Word-Length Requirements of Processing Blocks

Floating point arithmetic usually use IEEE 754 (32 bits: 24-bitmantissas, 7-bit exponent & 1 sign bit) which is adequate for highquality AC-3 encoding. Work-stations like Sun SPARCstation 20 canprovide much higher precision (e.g. double is 8 bytes). However,floating point units require more chip area and consequently most DSPProcessors use fixed point arithmetic. The AC-3 Encoder is oftenintended to be a part of a consumer product e.g. DVD (Digital VersatileDisk) where cost (chip area) is an important factor.

Being aware of the cost versus quality issue in the development of AC-3Dolby Labs. ensured that the algorithms could work well even onfixed-point processors.

The AC-3 Encoder has been implemented on 24-bit processors like theMotorola 56000 and has met with much commercial success. The quality ofAC-3 Encoder on a 16-bit processor, though universally assumed to be oflow quality, no adequate study (as yet not published) has been conductedto benchmark the quality or compare it with the floating point version.

Using double precision (32-bit) to implement the encoder on a 16-bitprocessor can lead to high quality (even more than the 24-bit version).However, double precision arithmetic is very computationally expensive(e.g. on D950 single precision multiplication takes 1 cycle while doubleprecision requires 6 cycles). Rather than performing single or doubleprecision throughout the whole cycle of processing, an analysis can beperformed to determine adequate precision requirement for each stage ofcomputation.

In the investigation that follows, for simplicity of expression (and toavoid repeating the same thing), the following convention has beenadopted. Notation x-y (set A:set B) implies that for the process, dataelements within Set A were truncated to x bits while the Set B elementswere y bits long. For example, 16–32(data:window) implies that forwindowing—data was truncated to 16 bits and the window coefficient to 32bits. When appearing without any parenthesised explanation, e.g. x-y:explanation of the implied meaning will be provided. If no explanationis provided the meaning must be clear from the context and the brevityof expression has taken precedence over repetition of the same idea.

MIPS and Quality have been made subject to the statistics obtained.

C. Coupling on a 16-Bit DSP

Assume that the frequency domain coefficients are identified as:

-   -   a_(i), for the first coupled channel    -   b_(i), for the second coupled channel,    -   c_(i), for the coupling channel,

For each sub-band, the value Σ_(i)a_(i)*b_(i) is computed, index iextending over the frequency range of the sub-band. IfΣ_(i)a_(i)*b_(i)>0,

coupling for this sub-band is performed as c_(i)=(a_(i)+b_(i))/2.

Similarly, if c_(i)=(a_(i)+b_(i))/2,

then coupling strategy for the sub-band is as c_(i)=(a_(i)+b_(i))/2.

Adjacent sub-bands using identical coupling strategies may be groupedtogether to form one or more coupling bands. However, sub-bands withdifferent coupling strategies must not be banded together. If overallcoupling strategy for a band is c_(i)=(a_(i)+b_(i))/2, i.e. for allsub-bands comprising the band the phase flag for the band is set to +1,else it is set to −1.

The computational requirements for the coupling process is quiteappreciable, which makes selection of right precision tricky. The inputto the coupling process is the channel coefficients each of 32-bitlength. The coupling progresses in several stages. For each such stageappropriate word length must be determined.

C. 1 Coupling Channel Generation Strategy

As explained in section before, the coupling channel generation strategyis linked to the product Σa_(i)*b_(i), where a_(i) and b_(i) are the twocoupled channel coefficients within the band in question. Although 32—32(double precision) computation for the dot product would lead to moreaccurate results, it will be quite computationally prohibitive. Theimportant fact to realise is that the output of this stage onlyinfluences how the coupling channel is generated, not the accuracy ofthe coefficients themselves. If the error from 16-bit computation is notappreciable large, computational burden can be decreased.

As shown in FIG. 3, for phase estimation and coupling coefficientgeneration strategy upper 16-bit of the full 32-bit data from theFrequency Transformation stage may be used. The actual couplingc_(i)=(a_(i)±b_(i))/2 is done using 32—32 (a_(i):b_(i)).

TABLE 1 Coupling Strategy: the 24—24 and the 16—16 approach are compared(%) with the floating point version. While 24—24 gives superior result,the 16—16 fares badly. Band 0 Band 1 Band 2 Band 3 16—16 24—24 16—1624—24 16—16 24—24 16—16 24—24 Drums 84.1 99.7 75 99.8 90 100 91 100 Harp75.2 99.2 72.7 99.4 78.1 99.5 75.1 99.5 Piano 88.2 99.9 84 99.4 86 99.276 98.7 Saxophone 73.6 99.9 56 99.8 76.2 99.7 81.4 9.8 Vocal 98.6 97.897.8 100 98.6 99.8 96.5 100

The results for 16—16 are shown in the table of FIG. 4. Clearly, theresults are not as desired. Upon analysis of the reason for the lowperformance it was discovered that usually the coupling coefficients arelow value. Even though the coupling coefficient is represented by32-bits the higher 16-bits are normally almost all zeros. Thereforesimple truncation of the upper 16 bits produce poor results. A variationof the block exponent strategy is used to improve the results.

FIG. 5 below shows a pre-processing stage before truncation of the32-bit to 16-bit for the phase estimation, coupling coefficientgeneration strategy and calculation of the coupling co-ordinates. Thecoefficients within the band (or sub-band depending on the level ofprocessing) are analysed to find the minimum number of leading zeros (inactual implementation the maximum absolute rather than leading zeros areused for scaling). The entire coefficient set within the band is thenshifted (equivalent to multiplication) to the left and then theremaining upper 16 bits are utilised for the processing. Note that forthe phase estimation and coupling strategy the multiplication factor hasno affect as long as both the left and right channels within the bandhave been shifted by same number of bits.

Similar approach of 16—16 (a_(i):b_(i)) is used for the couplingco-ordinate generation. However, the final division involved in theco-ordinate generation must preferably be done with highest precisionpossible. For this it is recommended that floating point operation beemulated, that is the exponents (equivalent to number of leading zero)and mantissa (remaining 16 bits after removal of leading zeros). Thedivision can then be performed using the best possible method asprovided by the processor to provide maximum accuracy. Since couplingco-ordinates anyway need to be converted to floating point format(exponent and mantissa) for final transmission, this approach has dualbenefit.

For the coupling co-ordinate generation phase, both the coupling and thecoupled channels should have the same multiplication factor so that theycancel out. Alternately, if floating point emulation is used asrecommended above, the coupling and coupled channels may be on differentscale. The difference in scale is compensated in the exponent value ofthe final coupling co-ordinate. Consider for the sake of the examplethat a band has only 4 bins, 96 . . . 99:

a[96]=(0000 0000 0000 0000 1100 0000 0000 1001)

b[96]=(0000 0000 0000 0000 0000 0000 0000 0100)

c[96]=(0000 0000 0000 0000 0110 0000 0000 0110)

a[97]=(0000 0000 0000 0000 1100 0000 0000 0000)

b[97]=(0000 0000 0000 0000 0001 0000 0000 1000)

c[97]=(0000 0000 0000 0000 0110 1000 0000 0100)

a[98]=(0000 0000 0000 0000 0000 0000 0000 1000)

b[98]=(0000 0000 0000 0000 0000 0000 0000 1100)

c[98]=(0000 0000 0000 0000 0000 0000 0000 1010)

a[99]=(0000 0000 0000 0000 1100 0000 0000 1000)

b[99]=(0000 0000 0000 0001 0000 0000 0000 1100)

c[99]=(0000 0000 0000 0000 1110 0000 0000 1010)

*Note: for this example :: ci=(ai+bi)12

Considering only the upper 16-bit will lead to poor result. For examplecoupling co-ordinate Ψa=(Σa²/Σb²) formula will be zero, thereby wipingaway all frequency components within the band for channel a when thecoupling coefficient is multiplied by the coupling co-ordinate at thedecoder to reproduce the coefficients for channel a. However by removingthe leading zeros, the new coefficients for channel a will be, as givenbelow, on which more meaning measurements can be performed

a[96]=(00 1100 0000 0000 10)

a[97]=(00 1100 0000 0000 00)

a[98]=(00 0000 0000 0000 10)

a[99]=(00 1100 0000 0000 10)

The scaling factor will have to be compensated in the exponent value forthe coupling co-ordinate. With this approach the performance of phaseestimation with 16—16 bit processing improves drastically as shown inTable 2, as compared to Table 1.

TABLE 2 Coupling strategy for the two implementation (16—16) and (24—24)as compared (in percentage %) to the floating point version. By use ofblock exponent method the accuracy of the 16—16 version is much improvedcompared to the figures in Table 1. Band 0 Band 1 Band 2 Band 3 16—1624—24 16—16 24—24 16—16 24—24 16—16 24—24 Drums 100 99.7 99.8 99.8 100100 99 100 Harp 99.7 99.2 99.4 99.4 99.5 99.5 99.57 99.5 Piano 100 99.999.9 99.4 99.9 99.2 100 98.7 Saxophone 100 99.9 100 99.8 76.2 99 81.4100 Vocal 100 98.8 97.8 100 99.4 99.8 99.6 100C.2 Coupling Co-Ordinate Calculations

The equation for coupling co-ordinate calculations for a band is asfollows

$\psi = \sqrt{\frac{\Sigma\lbrack a_{i}^{2} \rbrack}{\Sigma\lbrack c_{i}^{2} \rbrack}}$a_(i): Frequency coefficients, within the coupling band, for coupledchannel (a)a_(i): Frequency coefficients, within the coupling band, for couplingchannel

FIG. 5. shows the steps for coupling co-ordinate calculations. For eachchannel (channel 0, channel 1 and coupling channel) 32-bit coefficientswithin the band in question are analysed at 20,21,22 to determine thenormalisation value. This removes leading zeros (for positive values)and leading ones (for negative values) so that the next stage ofprocessing does not give poor result in presence of low power signals.After normalisation, the 32-bit coefficients values are truncated to16-bits. The power, defined as the sum of square of all coefficientswithin the band, is computed at 23,24,25 using the 16-bit values. Theresult is 40-bit long and so must be post-shifted at 26,27 to constrainit to 32-bits.

The 32-bit power values of each coupled channel is divided at 29,30 bytruncated 16-bit power value of coupling channel, produced by divisor28. The 16-bit resulting quotient is adjusted to 8 bits at 31,32 andused as index into a table 33,34 which stores the square root values for0 to 255.

All adjustments made in mantissa is accounted for in the exponent,including—shift value (for coupled channel in question, and the couplingchannel) used for normalising mantissa for power calculations,truncation of 40-bit product to 32-bit and adjustment for table lookup.Moreover, since equation for coupling co-ordinate requires square rootof the power ratio and not of just the mantissa, the exponent value mustbe divided by two (equivalent to square root of an exponential). Howevera subtle point that is very important is that if the exponent value isan odd number, simply dividing by two will lead to erroneous result. Insuch case exponent must be incremented by one to make it an even number.To compensate for the increment, the mantissa is readjusted (shiftedright by one bit).

Finally the mantissa and exponent are converted into the (4-bit foreach) format required for transmission into AC-3 frame.

To sum up, power values necessary for coupling co-ordinate calculationsare derived from 16-bit coefficients (obtained from normalisationfollowed by truncation of 32-bit coefficients). Square root of the ratioof power values is obtained for the mantissa part by a table look-up.The exponent, derived from shift values used for normalising couplingand coupled channel coefficients, is converted to an even number anddivided by two. This together with the table look-up for mantissa isequivalent to square root of the actual power ratio in the floatingpoint method used for calculating coupling co-ordinate.

1. A coupling process for use in reduced bit processing, includingcalculating a power value of a coupled channel by normalizing frequencycoefficients within a channel band to produce mantissas with respectivenormalization values represented by a prescribed reduced number of bits,calculating a sum of the square of the values and post-shifting theresultant sum to obtain a power value.
 2. A method as claimed in claim1, wherein the frequency coefficients are 32-bits and the prescribedreduced number of bits is
 16. 3. A method as claimed in claim 1, whereinthe power value of the coupled channel is divided by a power value of acoupling channel, having the prescribed reduced number of bits, toproduce a mantissa quotient.
 4. A method as claimed in claim 3, whereinthe power value of the coupling channel is obtained by combiningfrequency coefficients within a channel band of said coupled channel anda second coupled channel, normalizing coefficient mantissas of thecombined coefficients to produce mantissas with normalization valuesrepresented by the prescribed reduced number of bits, calculating a sumof the square of the values and representing the resultant sum of thecoupling channel in a prescribed number of bits greater than theprescribed reduced number of bits.
 5. A method as claimed in claim 3,wherein the quotient is indexed in a look-up table with an associatedsquare root value of the quotient.
 6. A method as claimed in claim 3,wherein the quotient is adjusted to eight bits for indexing in thelook-up table.
 7. A method as claimed in claim 3, wherein the powervalues of the coupled and coupling channels have respectivecoefficients, wherein exponents of each of the coefficients,corresponding to respective mantissas, are adjusted by normalizing theexponents to produce normalized exponents, truncating the normalizedexponents to produce truncated exponents, and post-shifting thetruncated exponents to produce adjusted exponents.
 8. A method asclaimed in claim 7, wherein the adjusted exponents of the coupledchannel are subtracted by the adjusted exponents of the coupling channelto produce an exponent quotient and the square root of the exponentquotient is obtained.
 9. A method as claimed in claim 8, wherein theexponent value of the exponent quotient is adjusted by 1 if the exponentvalue is odd and a corresponding shift is made in the associatedquotient of the mantissas.
 10. A method as claimed in claim 8, whereinthe coupling coordinate is represented by the square root of theexponent quotient in combination with a square root value of theassociated mantissa, obtained from the lookup table.
 11. A method asclaimed in claim 1, wherein a phase and coupling coefficient strategy ofthe coupling process are determined using the values of the normalizedmantissas.
 12. A signal processor for a coupling process having: firstand second coupled channel register; a coupling channel means forcombining frequency coefficients of the first and second coupledchannel; a coupling coordinate calculation means including:normalization means for analyzing mantissas of the frequencycoefficients in a channel band in each of the channels, thenormalization means producing first normalization values for eachrespective channel represented by a prescribed number of reduced bits;calculation means for determining a sum of the square of values for eachchannel; shifting means for post-shifting each sum to obtain a powervalue for each of the channels; divider means for providing a mantissaquotient by dividing the post shifted sum of the first and secondcoupled channels by the post shifted sum of the coupling channel,reduced to a prescribed number of reduced bits; and a lookup table forproviding square root values of the mantissa quotients, the square rootvalues representing a mantissa component of the coupling coordinate ofeach of the first and second coupled channels.
 13. A signal processor asclaimed in claim 12, wherein the registers provide 32 bit frequencycoefficients and the normalization means output 16 bit values,corresponding to the prescribed number of reduced bits.
 14. A signalprocessor as claimed in claim 12, including an exponent adjusting meansfor producing adjusted exponents for each frequency coefficient, of therespective coupled and coupling channels, in response to correspondingchanges in the mantissa values resulting from the normalization means,calculation means and divider means; an exponent calculation means forproviding an exponent quotient for each of the coupled channels byrespectively dividing the sum of the square of the adjusted exponents ofeach of the coupled channels by the sum of the square of the adjustedexponents of the coupled channel and taking the square root of therespective exponent quotients; and a coupling coefficient means forrepresenting the coupling coefficient of each of the first and secondcoupled channels by combining the square root of the exponents for eachof the coupled channels with the associated mantissa component.
 15. Asignal processor as claimed in claim 12 further including a phase andcoupling coefficient generation strategy means for determining the phaseand coupling coefficient strategy on the basis of the values of thenormalized mantissas.
 16. A signal processor for a coupling process foruse with a first coupled channel, the signal processor comprising:normalizing means for normalizing frequency coefficients of the coupledchannel to produce mantissas with respective normalization valuesrepresented by a prescribed reduced number of bits; calculating meansfor calculating a sum of the square of the values; and post-shiftingmeans for post-shifting the resultant sum to obtain a power value of thecoupled channel.
 17. The signal processor of claim 16, wherein thefrequency coefficients are 32-bits and the prescribed reduced number ofbits is
 16. 18. The signal processor of claim 16, further comprisingdivider means for proving a mantissa quotient by dividing the powervalue of the first coupled channel by a power value of a couplingchannel, having the prescribed reduced number of bits.
 19. The signalprocessor of claim 16, further comprising: coupling channel means forcombining frequency coefficients of the first coupled channel withrespective frequency components of a second coupled channel to obtainfrequency coefficients of a coupling channel, wherein the normalizingmeans normalizes the frequency coefficients of each of the channels toproduce respective mantissas with respective normalization valuesrepresented by a prescribed reduced number of bits, the calculatingmeans calculates respective sums of the square of the respective valuesfor the channels, and the post-shifting means post-shifts the respectivesums to obtain respective power values for the channels; and dividermeans for obtaining respective mantissa quotients for the first nadsecond channels by dividing each of the power values of the first andsecond channels by the power value for the coupling channel.
 20. Thesignal processor of claim 16, further comprising: a look-up table thatprovides square root values for the mantissa quotients.